Fedora have approved the creation of a new 'Electronic Laboratory'. The aim is to provide all the tools needed for an environment for designing and simulating ASIC design and embedded design. The opensource EDA solutions are composed to satify high-end mixed-signal hardware design flows from design specification to final project handoff.

The organizer, Chitlesh Goorah, has a blog likely to have the latest news.

Update

This release comprises Perl modules to facilitate both design, HDL code generation and brings additional support for Engineering Change Order (ECO). After post chip fabrication, evaluation boards of those chips can also be designed.

Existing RPM packages were updated to improve design experience in terms of development time and debugging. The key highlights of the major development items put the quality barrier higher than the previous releases:

• Perl modules to extend vhdl and verilog support. These Perl modules together with gtkwave improves chip testing support.
• Perl parsers for VHDL, Verilog and SystemC.
• Introduced collaborative development solutions.
• Introduction of Verilog-AMS modeling into ngspice.
• Improved VHDL debugging support with gcov.
• Improved support for re-usable HDL packages as IP core.
• Improved PLI support on both iverilog and ghdl
• Introduction of C-based methodologies for HDL testbenches and models.
• Improved co-simulation based hardware design.
• Introduction of design tools for DSP design flow.

Update
Bug fix release.

Update
Fixed bug 1 June 2009; now background colour selection works correctly.

Update
improved performance especially for huge designs, 64bit versions for all platforms, export of PostScript and Encapsulated PostScript, fixes some minor bugs

Whirlygig is a USB 1.1 device that contains a fast, high quality hardware random number generator. Via a Linux driver, each whirlygig you connect makes available an additional 7Mbits of high quality randomness a second, or 750-850KBytes/sec sustained using the standard /dev/hw_random API.

The main goal of POD ('Peripherals on Demand' is to permit FPGA-newbies to use FPGAs without writing any VHDL (or verilog) code. The user can choose components from a library. POD will automatically generate the "glue-files" to produce the FPGA configuration bitstream for the FPGA (Wishbone interconnect, top VHDL hierarchy,tcl script to automatize synthesis, pinout files etc) and the drivers on the OS side (if the component has driver templates for the OS).

Update
The new release comes with new translations into Arabic and Czech, model libraries for PMOSFETs, NMOSFETs, regulators, varistors and ideal components, and many new primitive components such as EPFL-EKV NMOS/PMOS V2.6, rectangular waveguide, HICUM L0 v1.2, HICUM L2 v3.23, photodiode, digital buffer, microstrip radial stub, phototransistor, RLCG transmission line and numerous new digital primitives. Passing parameters to Verilog-HDL and VHDL subcircuits and typed generic parameters of VHDL files are now supported as well as arbitrary in/out signals. Simulation time for digital files (Verilog and VHDL) are now stored in an additional configuration file and the import dialog has been replaced by a complete import/export frontend for the Qucs-Converter command line tool. US letter formats for schematic frame have been added. The build system now implements an additional install step for MacOSX and the appropriate icons. In the analogue simulation core global nodes (e.g. subst!) have been introduced, property references inside the same instance of a component and variables in constant parameter simulation boxes are allowed. A noise figure property has been added to the amplifier model and the matrix power operation is available in the equation solver. The Qucs-Converter command line tool allows now to translate existing HICUM models into library elements as well as the translation of polynomial C's and L's and F, H, E and G polynomial SPICE sources.

The goal of this project is to provide free hardware designs for telephone systems. Both the hardware and software are open. The hardware for a complete embedded Asterisk IP PBX (including multiple analog ports or a T1/E1) can be built for a few hundred dollars. No PC required!

The first product is the IP04. The IP04 is a low cost phone system that can switch phone calls from analog phones or phone lines over the Internet using VoIP. The IP04 is a professionally designed product that is in volume production today.